All things technical:

Here I will list any publishable projects that I have been working on in my spare time. This website is currently one of these projects.

VHDL 32bit/16bit divider - I have recently completed a VHDL design implementing a divider function for dividing an unsigned 32bit integer by an unsigned 16bit integer. It's a little slow requiring exactly 100 clock cycles to complete, but it's quite capable of running at high clock speeds (>50MHz) as a result. I may still do a quick write up of how it all works, but for now all I have to offer is a RAR archive of the project directory (made with Altera Quartus II v8). Download the archive here (2MB).

Most of the above downloads will be in RAR archive format. I'm afraid that I allow myself some excentricities and prefering RAR over ZIP is one of them. Get a copy of WinRAR to open the archive.

 

I have moved. My website also moved: kriegler.me.uk

Copyright (c) 2008 by Eduard Kriegler

Last update: 23 July 2008